The development of complex VLSI circuits has increased the need for more circuit simulation prior to fabrication of actual operating devices. The simulation of the circuits provides accurate data on representative samples, and these data are used for models and for process development. For statistical samples, voltage-current characteristics with a better than three percent accuracy are routinely available. However, statistical data for capacitances are scarce. Such data as are available have an accuracy of only about ten percent.
One method of measuring capacitance is to use a delay observed when propagating a signal through a chain of devices. The delay is related to the RC time constant of the device, which may vary substantially due to fabrication misalignments or other effects of manufacturing. Thus, on a wafer of theoretically uniform devices, the RC time constant of a device on one edge of the wafer may be greatly different from the RC time constant of a device on an opposing edge. The precision of the measurement suffers accordingly.
In conventional VLSI circuits, the individual devices are sized on the order of fractions of microns and have capacitances in the subfemtofarad range. Direct measurements of capacitance in this range are difficult and time consuming. A need has therefore arisen in the industry for a quick and accurate method for characterizing the capacitance of VLSI devices.